1. Field of the Invention
The present invention relates to the field of operational amplifiers.
2. Prior Art
Operational amplifiers of various types are well known in the prior art. Such amplifiers may be characterized as having a differential input of a high impedance, a single-ended output of a low impedance and a high gain, as in FIG. 1. Most present day operational amplifiers are required to operate from a single power supply voltage with the common mode input voltage range extending to ground, and the output voltage capable of swinging to both supply rails. These amplifiers typically have a folded cascode stage which converts the double-ended output of the differential input stage to a single-ended drive for the complementary output drivers. Such an amplifier may be seen in the circuit of FIG. 2, which is representative of prior art amplifiers.
In the circuit of FIG. 2, current I1 from a current source is provided to a pair of source-coupled p-channel transistors P1 and P2. The current I1 will divide between transistors P1 and P2 in a proportion responsive to the differential voltage applied between the positive and negative inputs to the gates of those transistors, setting the gate to source voltages of the transistors.
The folded cascode stage of the operational amplifier illustrated in FIG. 2 is comprised of current sources I2, I3, I4 and I6, p-channel transistor P3, n-channel transistor N1, bipolar transistors Q1 and Q2, and resistors R1 and R2. Current source I2 sets a predetermined current I2 through transistor Q1 and a corresponding current component through resistor R1, and current source I3 sets a predetermined current I3 through transistor Q2 and a corresponding current component through resistor R2. Resistors R1 and R2 also receive current components totaling I1 from the differential input stage. The voltage of the common base connection of transistors Q1 and Q2 is set through a local feedback loop composed of p-channel source follower P3 and n-channel source follower N1. In particular, if transistor Q1 is not sufficiently turned on to carry the current I2, current source I2 will charge node A, driving the same high to turn off p-channel transistor P3. Now, current source I4 will charge node C, raising the voltage on the gate of n-channel transistor N1 to turn on the n-channel transistor more, thereby raising the base voltage of transistors Q1 and Q2 to turn on transistor Q1 sufficiently to carry the current I2. Similarly, if transistor Q1 is turned on too hard so as to conduct more current than I2, the voltage on node A will be lower and will turn on p-channel transistor P3 more. Thus, the voltage on the gate of n-channel transistor N1 will be lower, tending to reduce the conduction through transistor N1 to lower the base voltage on the transistors so as to reduce the conduction of transistor Q1 to just that required to carry the current I2. In a typical amplifier of the type being described, current sources I2 and I3 and will be equal, transistors Q1 and Q2 will be identical and resistors R1 and R2 will be equal.
In operation, the two fractional components of the current I1 through p-channel transistors P1 and P2 will also flow through resistors R1 and R2, respectively. When the differential input voltage applied to the gates of p-channel transistors P1 and P2 is zero, the current I1 will divide equally to flow through resistors R1 and R2. Accordingly, in this state the voltage across resistor R1 will equal (I1)(R1)/2+(I2)(R1). Similarly, the voltage across resistor R2 will be equal to (I1)(R2)/2+(I3)(R2). Assuming I2 equals I3 and R1 equals R2, the voltage across resistors R1 and R2 will be equal, the voltage on the bases of transistors Q1 and Q2 will be one VBE above the voltage across resistors R1 and R2. In normal operation with no load, the voltage at node B will be at the gate-source voltage of N2. The device sizes of P3 and N1 are chosen such that the voltage at node A is substantially the same as the voltage at node B.
The quiescent current in the output n-channel transistor N2 and p-channel transistor P4 is controlled by the block labeled PMOS DRIVE. This block also controls the drive to the p-channel transistor when sourcing a load current.
In addition to providing drive current to an external load, the output stage in this amplifier also provides voltage gain and is the second gain stage of the overall amplifier. The requirement of the output being able to swing rail-to-rail of most present day amplifiers precludes the use of a buffer between the second gain stage and output of the amplifier. The overall gain of this amplifier is given by
AV=A1*A2 where
A1=gain of the combination of input stage and the folded cascode stage and equals the change in voltage at node B divided by the applied differential input voltage PA2 A2=gain of the second stage and equals the change in output voltage divided by the change in voltage at node B
In normal operation, a change in the output voltage at VOUT will require a change in the voltage at node B of .DELTA.VOUT/A2. Thus, the collector to emitter voltages of Q2 will change as a function of the output voltage. The voltage at node A will be substantially independent of the change in the output voltage and thus, the collector to emitter voltage of Q1 is independent of the output voltage. Finite output impedance of the transistors due to Early voltage effects will cause the currents in both transistors to be different for unequal collector to emitter voltages. Consequently, the current in resistors R1 and R2 will be unbalanced as a function of a change in the output voltage. This has to be compensated by a non-zero differential voltage to the p-channel input pair of P1 and P2. When driving a heavy output load, the gain of the second stage is lower than its no load value, thus reducing the overall gain of the amplifier even further.
For example, when a small resistor is connected between the output and the positive supply, the current in the n-channel transistor is a function of VOUT. When the output voltage swings between the positive supply and ground, a large excursion in the voltage of node B is required to support the large change in the current in n-channel transistor N2.
At the same time, the voltage of node A will be substantially constant, as the differential input will still be relatively small and the current component in resistor R1 from the non-zero differential input to the amplifier will also be small. Consequently for high voltages at node B for sinking large load currents, the collector to emitter voltage of bipolar transistor Q2 will be much larger than for bipolar transistor Q1. Because of the Early effect, the base to emitter voltage of transistor Q2 to provide a collector current in transistor Q2 equal to I3 will be less than the base emitter voltage of transistor Q1 to provide the same collector current. Consequently to obtain the higher voltages for node B, since the base voltages of transistors Q1 and Q2 are equal, the current through resistor R2 must be higher than the current through resistor R1. This higher current thorough transistor R2 must come from the input stage, requiring that transistor P2 be turned on a little more and transistor P1 be turned off a little, or the differential input voltage be a little more negative than for lighter loads. Since the output was assumed to be sinking current, the differential input must have been negative anyway. Therefore it may be seen that the increased negative differential input voltages required to drive larger loads represents a reduction in the gain of the amplifier (ratio of output to input to the amplifier). Consequently such amplifiers suffer an undesired reduction in gain for larger loads, contrary to the desired high gain for such amplifiers.